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ST1L02xx
Very low quiescent BiCMOS voltage regulator
Features

Fixed output voltage: 1.8 V, 2.5 V, 3.3 V (1.5 V, under customer request) Output voltage tolerance: 2 % at 25 C Output current capability: 1 A minimum Very low quiescent current: max 500 A over temperature range Typ. dropout 0.7 V (@ IO = 1 A) Stable with low ESR ceramic capacitors Available with and without the external output voltage sense pin Thermal shutdown protection with hysteresis Over current protection Operating junction temperature range: from 0 to 125 C Internal protection circuitry includes thermal protection with hysteresis and over current limiting. The ST1L02xx is especially suitable for data storage applications such as HDDs, where can be used to supply the read channel and memory chips requiring 3.3 V. The regulator is available in the small and thin DFN6D (3x3 mm) package.
DFN6D (3x3 mm)
Description
The ST1L02xx is a low drop linear voltage regulator capable to supply up to 1 A output current. The output voltage is fixed to 3.3 V, but under customer request, it's possible to have also 1.5 V, 1.8 V and 2.5 V. Thanks to the BiCMOS technology, the quiescent current is well controlled and maintained below 650 A over the whole allowed junction temperature range. The ST1L02xx is stable with low ESR output ceramic capacitors. Table 1. Device summary
Part numbers ST1L02XX18 ST1L02XX25 ST1L02XX33 ST1L02XX
1. Only 3.3 V
Order codes ST1L02PU18R ST1L02PU25R ST1L02PU33R ST1L02PUR
(1)
Package DFN6D (3x3 mm) DFN6D (3x3 mm) DFN6D (3x3 mm) DFN6D (3x3 mm)
March 2008
Rev 8
1/19
www.st.com 19
ST1L02xx
Contents
1 2 3 4 5 6 7 8 Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
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ST1L02xx
Diagram
1
Figure 1.
Diagram
Schematic diagram
3/19
Pin configuration
ST1L02xx
2
Figure 2.
Pin configuration
Pin connections (top through view)
ST1L02PXxx
ST1L02PX *
* Only 3.3 V.
Table 2.
Pin description
Pin n for ST1L02PX 1, 4, 5 6 2 3 Symbol N.C. GND VO VO_SENSE VI Not connected. Ground. The exposed metallic pad of the package is connected to GND. Output voltage pin. Bypass with a 4.7 F capacitor to GND. Sense output voltage pin. Must be connected to pin 4. Supply voltage input pin. Bypass with a 4.7 F capacitor to GND. Name and function
Pin n for ST1L02PXxx 1, 3 2 4 5 6
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ST1L02xx
Maximum ratings
3
Table 3.
Symbol VI PTOT IO TOP TSTG TLEAD
Maximum ratings
Absolute maximum ratings
Parameter DC supply voltage Power dissipation Output current Operating junction temperature range Storage temperature range
(1)
Value 10 internally limited internally limited 0 to 150 -65 to 150 260
Unit V W A C C C
Lead temperature (Soldering) 10 Sec.
1. Storage temperature >125 C are acceptable only if the regulator is soldered to a PCBA.
Note:
Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. Thermal data
Parameter Thermal resistance junction-case Thermal resistance junction-ambient Value 10 55 Unit C/W C/W
Table 4.
Symbol RthJC RthJA
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Electrical characteristics
ST1L02xx
4
Table 5.
Electrical characteristics
Electrical characteristics for ST1L02XX18 (refer to the typical application schematic, VI = 4.5 V to 7 V, IO = 5 mA to 1 A, CI = 4.7 F, CO = 4.7 F, TJ = 0 to 125 C, unless otherwise specified). Typical values are intended at TJ = 25 C unless otherwise specified.
Parameter Output voltage Output voltage Line regulation Load regulation Output current limit Minimum output current for regulation Dropout voltage (1) Quiescent current Quiescent current Supply voltage rejection RMS Output noise (2) Load transient (rising) (3) Load transient (falling) (3) Start-up transient (3) Short circuit removal response
(3) (2)
Symbol VO VO VO VO IS IOMIN Vd IQ IQ SVR eN VO/IO VO/IO VO/VI VO/IO TSH
Test VI = 4.75 V to 5.25 V, T=25C VI = 4.75 V to 5.25 V VI = 4.75 V to 5.25 V VI = 4.75 V, IO = 10 mA to 1 A VI = 5.5 V
Min. 1.764 1.746
Typ. 1.8 1.8
Max. 1.836 1.854 15 10
Unit V V mV mV A
1.0 2
mA V V A A dB %VO
IO = 0.8 A IO = 1 A VI = 5 V, IO = 2 mA to 1 A, T = 25C VI = 7 V, IO = 2 mA to 1 A VI = 5 0.5 V, IO = 5 mA, f = 120 Hz B = 10 Hz to 10 kHz, VI = 5 V, IO = 5 mA VI = 5 V, any 200 mA step from 100 mA to 1 A, tR 1 s VI = 5 V, IO = 1 A to 10 mA, tF 1 s VI =0 V to 5 V, IO = 10 mA to 1 A, tR 1 s VI = 5 V, IO = short to 10 mA 165 50 75 0.003
1.6 1.6 500 650
5 3.6 3.5 3.5
%VO V V V C
Thermal shutdown trip point (3) VI = 5 V
1. See minimum start-up voltage, VI = 3.3 V. 2. Guaranteed by design. Not tested in production. 3. CI = 10 F, CO = 10 F, all X7R ceramic capacitors.
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ST1L02xx
Electrical characteristics
Table 6.
Electrical characteristics for ST1L02XX25 (refer to the typical application schematic, VI = 4.5 V to 7 V, IO = 5 mA to 1 A, CI = 4.7 F, CO = 4.7 F, TJ = 0 to 125 C, unless otherwise specified). Typical values are intended at TJ = 25 C unless otherwise specified.
Parameter Output voltage Output voltage Line regulation Load regulation Output current limit Minimum output current for regulation Dropout voltage (1) Quiescent current Quiescent current Supply voltage rejection RMS Output noise (2) Load transient (rising) (3) Load transient (falling) (3) Start-up transient (3) Short circuit removal response
(3) (2)
Symbol VO VO VO VO IS IOMIN Vd IQ IQ SVR eN VO/IO VO/IO VO/VI VO/IO TSH
Test VI = 4.75 V to 5.25 V, T = 25C VI = 4.75 V to 5.25 V VI = 4.75 V to 5.25 V VI = 4.75 V, IO = 10 mA to 1 A VI = 5.5 V
Min. 2.45 2.4375
Typ. 2.5 2.5
Max. 2.55 2.5625 15 10
Unit V V mV mV A
1.0 2
mA V V A A dB %VO
IO = 0.8 A IO = 1 A VI = 5 V, IO = 2 mA to 1 A, T= 25C VI = 7 V, IO = 2 mA to 1 A VI = 5 0.5 V, IO = 5 mA, f = 120 Hz B = 10 Hz to 10 kHz, VI = 5V, IO = 5 mA VI =5 V, any 200 mA step from 100mA to 1A, tR 1 s VI = 5 V, IO = 1 A to 10 mA, tF 1 s VI =0 V to 5 V, IO = 10 mA to 1 A, tR 1 s VI = 5 V, IO = short to 10 mA 50
0.6 0.7
1.0 1.1 500 650
75 0.003 5 3.6 3.5 3.5 165
%VO V V V C
Thermal shutdown trip point (2) VI = 5 V
1. See minimum start-up voltage, VI = 3.2 V. 2. Guaranteed by design. Not tested in production 3. CI = 10 F, CO = 10 F, all X7R ceramic capacitors.
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Electrical characteristics
ST1L02xx
Table 7.
Electrical characteristics for ST1L02XX33 (refer to the typical application schematic, VI = 4.5V to 7V, IO = 5mA to 1A, CI = 4.7F, CO = 4.7 F, TJ = 0 to 125 C, unless otherwise specified). Typical values are intended at TJ = 25 C unless otherwise specified.
Parameter Output voltage Output voltage Line regulation Load regulation Output current limit Minimum output current for regulation Dropout voltage Quiescent current Quiescent current Supply voltage rejection RMS Output noise (2) Load transient (rising) (1) Load transient (falling) (1) Start-up transient (1) Short circuit removal response
(1) (2)
Symbol VO VO VO VO IS IOMIN Vd IQ IQ SVR eN VO/IO VO/IO VO/VI VO/IO TSH
Test VI = 4.75 V to 5.25 V, T = 25C VI = 4.75 V to 5.25 V VI = 4.75 V to 5.25 V VI = 4.75 V, IO = 10 mA to 1 A VI = 5.5 V
Min. 3.234 3.2175
Typ. 3.3 3.3
Max. 3.366 3.3825 15 10
Unit V V mV mV A
1.0 2
mA V V A A dB %VO
IO = 0.8 A IO = 1 A VI = 5 V, IO = 2 mA to 1 A, T= 25C VI = 7 V, IO = 2 mA to 1 A VI = 5 0.5V, IO = 5 mA, f = 120 Hz B = 10 Hz to 10 kHz, VI = 5 V, IO = 5 mA VI = 5 V, any 200 mA step from 100 mA to 1 A, tR 1 s VI = 5 V, IO = 1 A to 10 mA, tF 1 s VI =0 V to 5 V, IO = 10 mA to 1 A, tR 1 s VI = 5 V, IO = short to 10 mA 50
0.6 0.7
1.0 1.1 500 650
75 0.003 5 3.6 3.5 3.5 165
%VO V V V C
Thermal shutdown trip point (2) VI = 5 V
1. CI = 10 F, CO = 10 F, all X7R ceramic capacitors. 2. Guaranteed by design. Not tested in production.
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ST1L02xx
Typical application
5
Figure 3.
Typical application
Application schematic for ST1L02PM
Figure 4.
Application schematic for ST1L02PMxx
Note:
The regulator is designed to be stable with either tantalum and ceramic capacitors on the input and the output. The expected values of the input and output ceramic capacitors are from 1 F to 22 F with 4.7 F typical. The input capacitor must be connected within 0.5 inches of the VI terminal. The output capacitor must also be connected within 0.5 inches of output pin. There is no upper limit to the value of the input capacitor.
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Typical characteristics
ST1L02xx
6
Figure 5.
Typical characteristics
Output voltage vs temperature Figure 6. Line regulation vs temperature
Figure 7.
Line regulation vs temperature
Figure 8.
Load regulation vs temperature
Figure 9.
Dropout voltage vs temperature
Figure 10. Quiescent current vs temperature
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ST1L02xx Figure 11. Quiescent current vs temperature
Typical characteristics Figure 12. Quiescent current vs temperature
Figure 13. Quiescent current vs temperature
Figure 14. Quiescent current vs output current
Figure 15. Supply voltage rejection vs temperature
Figure 16. Supply voltage rejection vs frequency
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Typical characteristics
ST1L02xx
Figure 17. Output noise vs frequency
Figure 18. Change of VO with step load change
VI=5V, IO=100mA to 300mA, CO=10F, CI=10F, tRISE1s
Figure 19. Change of VO with step load change
Figure 20. Change of VO with step load change
VI=5V, IO=300mA to 500mA, CO=10F, CI=10F, tRISE1s
VI=5V, IO=500mA to 700mA, CO=10F, CI=10F, tRISE1s, TJ=25C
Figure 21. Change of VO with step load change
Figure 22. Change of VO with step load change
VI=5V, IO=700mA to 900mA, CO=10F, CI=10F, tRISE1s, TJ=25C
VI=5V, IO=10mA to S.C., CO=10F, CI=10F, tRISE1s, TJ=25C
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ST1L02xx
Typical characteristics
Figure 23. Line transient
VI = 4.75 V to 5.25 V, IO = 500 mA, CO=10 F, CI = 2.2 F, tRISE 1 s
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Package mechanical data
ST1L02xx
7
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
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ST1L02xx
Package mechanical data
DFN6D (3x3 mm) mechanical data
mm. Dim. Min. A A1 A3 b D D2 E E2 e L 0.30 0.23 2.90 2.23 2.90 1.50 0.95 0.40 0.50 0.012 3.00 3.00 0.80 0 0.02 0.20 0.45 3.10 2.50 3.10 1.75 0.009 0.114 0.088 0.114 0.059 0.037 0.016 0.020 0.118 0.118 Typ. Max. 1.00 0.05 Min. 0.031 0 0.001 0.008 0.018 0.122 0.098 0.122 0.069 Typ. Max. 0.039 0.002 inch.
7946637B
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Package mechanical data
ST1L02xx
Tape & Reel QFNxx/DFNxx (3x3) Mechanical Data
mm. Dim. Min. A C D N T Ao Bo Ko Po P 3.3 3.3 1.1 4 8 12.8 20.2 60 18.4 0.130 0.130 0.043 0.157 0.315 Typ. Max. 330 13.2 0.504 0.795 2.362 0.724 Min. Typ. Max. 12.992 0.519 inch.
16/19
ST1L02xx
Package mechanical data
Figure 24. DFN6 (3x3 mm) footprint recommended data
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Revision history
ST1L02xx
8
Table 8.
Date
Revision history
Document revision history
Revision 1 2 3 4 5 6 7 8 First release. Add new order codes and tables of the electrical characteristics. General feature has been updated and add note 3 in table 6. Updated mechanical data DFN6 (3x3). Add note in Figure 2 and in order codes. Add order codes and mechanical data DFN6D. Add Table 1 in cover page. Removed: mechanical data DFN6. Changes
25-Feb-2005 10-Jan-2006 16-May-2006 05-Jul-2006 22-Feb-2007 03-Apr-2007 05-Sep-2007 12-Mar-2008
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ST1L02xx
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